Alif Semiconductor /AE512F80F5582AS_CM55_HP_View /LPSPI /SPI_DMATDLR

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Interpret as SPI_DMATDLR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DMATDL

Description

DMA Transmit Data Level Register

Fields

DMATDL

Transmit Data Level. This bit field controls the level at which a DMA request is made by the transmit logic. It is equal to the watermark level; that is, the transmit DMA request signal is generated when the number of valid data entries in the transmit FIFO is equal to or below this bit field value, and the SPI_DMACR[TDMAE] = 0x1.

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